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SKYbolt II Architecture

The SKYbolt II is part of a modular set of building blocks that can be configured uniquely to create the optimum solution for your design and deployment needs.

At SKY Computers each program is evaluated for its specific requirements to architect the ideal balance of processing performance, memory capacity, and I/O bandwidth. SKY's proposal, derived from a mutual understanding of the objectives, includes the required off-the-shelf SKY building blocks, suggestions for partner-supplied components, and recommendations for new technologies to be developed by or with SKY. The result of this partnership achieves maximum advantage in time-to-market, performance, and cost. SKY has the expertise, the flexibility and the resources to provide the complete solution.

The 6U and 9U SKYbolt II motherboards provides all the resources required to obtain optimal performance from SKY's family of processor and I/O daughtercards. Data is transferred throughout the SKYbolt II motherboard over the SKYchannel Packet Bus, capable of moving information at 320 MB/sec. That data moves transparently through the SKYchannel P2 interface to other boards in a SKYchannel system, whether they are in the same chassis or a different chassis. (Click on images to enlarge view.)

System control is handled by the System Processor, which performs I/O and operating system tasks that would otherwise burden the compute processors. A full VME 64 interface provides communication to the host and other for off-board communication.

The application runs on the processors resident on the MPC7410-based Merlin daughtercard. Memory or front-panel I/O expansion daughtercards may be added without removing any of the compute processors.

System Processor
The SKYbolt II architecture utilizes a System Processor (SP) to off-load system-level functions from the compute processors. The core of the SP is an Intel i960CA superscalar processor. SKY adds 256 KB SRAM used as zero-wait-state RAM and 512KB Flash RAM for non-volatile storage of configurable boot code. This configuration not only allows the compute daughtercards to be more effective at executing the numerically intensive tasks but also provides more systems-level functionality.

System Processor Features

  • Provides the bulk of the operating system services, freeing the compute processors to run more efficiently with a small kernel
  • Quickly fields all interrupts, and informs a compute processor only when there is a task specifically for that processor
  • Controls interface synchronization, polling, and setup on a separate bus, freeing SKYchannel from performance draining single-word transfers
  • Executes a programmable list of I/O operations as directed by a compute processor, while that processor continues computation

VME 64 Interface
The SKYbolt II includes a fully featured VME 64 Master/Slave interface. Data transfers using multiplexed block mode transfers (MBLT) provide high performance communication with other VME boards. The fully programmable master/slave interface supports Read-Modify-Write (RMW) cycles, three programmable release methods, requester on all levels, interrupter on all levels, and VME Retry. A special communication buffer RAM enhances performance of VMEbus RWM cycles. Programs have the flexibility of accessing the VME interface directly or handing off the communication task to the System I/O processor.

Technical Support and Warranty Programs
SKY's commitment to quality begins with the industry's longest standard hardware warranty. All SKYbolt II family hardware products have a standard three year warranty. Throughout your development and deployment, SKY's experienced technical support engineers follow up with the support you need when you need it.

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